The Agilex 5 line targets optimized performance for applications specifically targeting the embedded segments, such as industrial broadcast, video and vision, as well as other edge applications, said Yadavalli. “We are also planning to expand this this family of products even further to get into that edge compute,” he said.
Agilex 3 is related to the low-end power and cost optimized product, which enables Altera to get into constrained applications where the size, weight and power become the primary vectors, he added.
On the software side, Quartus Prime v25.3 delivers faster compile times, lower resource use, and enhanced developer productivity. The new Quartus release includes early access to Visual Designer Studio, Altera’s 4th-generation system integration tool. Visual Designer Studio accelerates IP integration by automating the process of connecting IP blocks in the design flow. Altera claims Visual Designer Studio can slash the time it takes to get started on an FPGA design from five days to two hours when compared to using only RTL.
The full Agilex family is available now.
